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Either amazon transistors suck, or I am an idiot...


Well-Known Member
Nov 28, 2018
It's an audio amp that just won't put out the voltage I expect from it. I designed it for 4v pk-pk, but it hardly gets to 2v pk-pk before flat-topping . It's a push-pull class B, 6v supply (split, but that doesn't matter much here) driving an 8Ω speaker. Take a look at the schematic and I'll walk you through what I did to find the values I used.


Step 1) The push-pull pair needs degeneration resistors, I went with 1Ω as I had them available. So that means each transistor will see a 9Ω load.

Step 2) Being I want 4v pk-pk (2v work from each transistor), 2v/9Ω=222mA should be the max current that each transistor will ever see (rms will be lower, but I am worried about calculating base current here).

Step 3) My transistor tester says these S8050 and S8550 transistors have beta of 200. So, that means the base current should be 222mA/200=1.1mA. But for the emitter follower driving the base to supply it, that transistor will also need some current, so I double it and say 2.2mA through those resistors. To have the push-pull pair biased for B, I need .7v on the top driver emitter and -.7v for the bottom driver's emitter.

Step 4) that means the emitter resistors will have 3v-.7v=2.3v across them when biased properly. And 2.3v/2.2mA=1045Ω.

Step 5) Biasing the drivers. Assuming that bias network needs to have 10x the base current per usual design, 2.2mA/200*10=.11mA and 6v/.00011A=54,545Ω total ~ I just call it 22KΩ each.

Step 6) If I were to input a signal here, it would see those two bias resistors in parallel, and to cut a few corners, lets call the impedance here 10kΩ.

Step 7) So, if I want to drive that with very little voltage drop, I need a 1kΩ source impedance or better... I also need voltage gain of 4 because my signal is .5v pk-pk and I want 2v pk-pk, so lets kill 2 problems with 1 transistor. Calling the collector resistor my output impedance (1k), that makes my emitter resistor 250Ω. I used 220Ω as that's all I had.

Step 8) Biasing that bugger now... Again, with a beta of 200 and following the usual procedure (and assuming the collector is going to sit at about .35v to split the voltage available after the emitter resistor eats a little wiggle room).... 3v-.35v=2.65v across the 1kΩ resistor for a collector current of 2.65mA. That means there is 2.65mA/200*10=.133mA through the bias network for that stage. And with 2.65mA also going through the 220Ω emitter resistor, I figure the base voltage will be around .00265A*220Ω=.583v at the emitter, so -3v + (.583v+.7v) = -1.283v at the base. So the bottom resistor will have 1.283v across it and the top resistor will have 4.717v across it. And since we know the current, 1.283v/.000133A=9,647Ω and 4.717v/.000133A=35,466Ω. And that 1.283v leaves plenty wiggle room for my .5v pk-pk input signal (I used 47k and 12k, close enough).

At this point, the input impedance is too low for my signal, but I tested the circuit anyhow using my signal generator (that can drive that easily), and for some reason, when I do, the signal looks great until it gets to the final stage where the output is clipping at about 1v pk-pk.

A couple comments quick... I am also omitting a few nF caps across the transistors as this thing started oscillating on countless HF frequencies without them. But, they do not seem to lower the signal of interest when used. For the resistors, I followed the procedure explained in The Signal Path's youtube video #23, so I have a hard time thinking I did something wrong as that guy is pretty sharp... And lastly, I don't need this to work as I got pissed and scrapped the project and yanked a TA7222AP out of a cobra 25 to get the job done (which added 2 AA batteries), but I am nonetheless very confused and want to know what went wrong with this. I would expect a little voltage loss here, but I would at least like to see 1.7v pk-pk, not just barely 1v... I need to know if I am missing something here or if these transistors are just effing with me... I feel like I am missing something stupidly simple here. Thanks!
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Sr. Member
Sep 19, 2009
I think the problem has to do with the DC biasing on your first single-ended transistor driver. Since it is single-ended and NPN, I don't think it should be powered from the same split rail Supply that is feeding the complementary symmetry outputs. If I suspect what is happening is correct, your output will be flat topping right at the output of that first transistors collector.

If no other Supply is available other than the plus and minus 3 V, you may get better results if you bias the first transistor up, so that the collector voltage is at 1.5 volts, with no signal. I'm having a hard time seeing how the transistor can swing negative, unless it's in the middle of the positive voltage available. My theory would be supported, if you see one side of the waveform, clipping well before the other.
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Well-Known Member
Nov 28, 2018
The first transistor is decoupled from the rest of the circuit and the emitter is at the -3v rail, so as far as that transistor is concerned, it is biased with the collector in the middle of a typical 6v unsplit supply. The signal coming from there is great at about 4v pk-pk.

I made the assumption that the hfe shown on my little transistor tester was the right number to use for gain calculations.... It was pointed out to me that the hfe is not the same at high current and pushing to the voltage rails compared to a small signal at a minimal current. I measured the hfe under the conditions I wanted it to work at and the hfe wasn't the 200 my transistor tester showed, but about 35 in this case. After adjusting for the new hfe value, it worked much better. I am going to experiment with bootstrapping as well, I just haven't got to it. Long story short, I should have designed it with the datasheet minimum hfe to start with.

Edit: while I can still, I made a few typos in the first post. I was giving it a 1v pk-pk signal and needed 4v pk-pk out.
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