When you put a working transistor into that position - the power flows into and thru it to make L21 "ring" and is why you get DC bias readings.
Ok, to keep this a little more on track...
L21 is used as the "tripler output" TR 20 as an amp - as in - the loop - look at how it is oriented, the UHIC chip sends it a "sample" and this is where the PLL looks for errors.
This circuit is PART OF the tripler that goes to the UHIC007 vertical chip - which contains the VARACTOR that looks at the PLL for something in which to tune it's resonant circuit using - that tiny variant of voltage changes the channels - and the PLL takes care of the rest - in a convoluted way.
The UHIC007 chip takes the tripler, and the IF mixes in with it, the PLL sees this and corrects any drifting errors by adjusting the trickle voltage it sends to that VARACTOR. The RF output is from the tripler, MINUS the IF and any errors are corrected then feed back into the Varactor voltage as a trimming effect.
That is the purpose of TR20 - that is the one part that amplifies the errant signals to even let them be detected - that is the other portion of the PLL uses - a LOW-Pass filter is used and the output is sent to the PLL to be checked and run against as a divisor result. Pin 17 is run against the internal pin select from the Channel Selector - so it's "clocked" and Pin 1-2, and 3-4 on the other side - provide a set of "windows" that Pin 5 (result) works against.
When the Gate result is a "miss" the varactor voltage sent to UHIC007 chip is lower - so that changes the capacitance to a lesser value - increasing the ringing speed of the free running oscillator the UHIC chip works.
When the Gate result is a "Hit" the varactor voltage is higher so the UHIC varactor sees more (summed) voltage - increasing this capacitive effect. This SLOWS down that free running Oscillator - simply due to the change in capacitance in this free running Oscillator (as controlled by the UHIC chip can)
This means that when the Pin 5 pulse is gated and no hit or misses - the result stays the same - so the next count then occurs and it's sampled again and Pin 5 shoots a pulse and compared thru Gates at 1-2 and 3-4 with that result sent to the varactor in the UHIC chip.
Pin 6 acts as a "back stop" when the oscillator gets out of range - Pin 5 annd Pin 17 are key to how Pin 6 operates and by how you control Pin 6 - either by external or an internal failure or control - tells the system to stop what it's doing or continue.
- That is why I mentioned that #248 line - that line is from the channel selectors "off detent" detect switch - tells the system the pins are not set right and await to stabilize and then re-load and run.
- This function is important to know for if the system can't change the channel - you may change it - the PLL still thinks it needs to latch onto that last known good input on the selector pins. If the detent switch is not used, the system may not understand your new pin assignment and the frequency you're selecting.
So since the L21 Value - side stays pretty much the SAME, the tiny change in Varactor capacitance by changing its voltage - changes the resonate frequency L21 presents to the UHIC chip and TR20 - and makes this work the way it does.
To touch on that transistor - that 3.36 volts in the emitter output is for the bias being stable and there is power flowing into and thru that L21 coil into TR20 - so when you measure - that 3.36 V is the expected DC bias - it will also have an AC component too - that being the RF the tripler will need to send to that UHIC007 chip.
There are several threads out here explaining the effect.