With the stock 11.325 crystal, jiggering the PLL binary inputs makes the top frequency is 28.045. To reach 28.5, that's 455 KHz higher than 28.045. Since the PLL downmix crystal is multiplied times three, the crystal needs to be one-third that much, just more than 150 kHz higher. The 11.475 crystal used for upper channels in the Expo 100 kit will get you this high if you jigger the PLL binary inputs to reach the chip's max frequency. To reach 28.5 without touching the PLL's binary inputs, this is a difference between 28.5 and 27.4 (or so) of 1.1 MHz. Since the PLL crystal is multiplied by three, divide 1.1 MHz by three we need a crystal that's 367 kHz higher than 11.325, or 11.692 MHz. Should make CB channel 40 about 28.5 MHz.
Jiggering the PLL would get you 640 kHz higher, to 29.14 or so.
Retuning a handful of RF transformers and coils will be necessary. The PLL won't stay locked all the way up to 28.5 without being adjusted properly.
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