I had this info somewhere but can't for the life of me find it again I need to get down to 26.815 as its the local channel around here anyone have this? Also on a pll03a couldn't it just be swapped out for an 02a making the radio then modifiable?
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PLL01A channel mod?
- Thread starter Harley3315
- Start date
The PLL01A has a normal binary divider and can be modified by changing the binary. The PLL03A was the first PLL with a ROM and the N values cannot be changed. I think you will need a crystal swap for that one.
Looking at the block diagram for a hygain 681 (since that radio uses the PLL01A) and hoping it is relevant, looks like in that radio, the input binary would need to be 10111001 for N=185 to get 26.815. By the same logic, ch1 should be 11001000 for N=200 for verification first.
Reasoning: 26.815-5.945=20.87 and 20.87-(9.51*2)=1.85MHz into the PLL.
Looking at the block diagram for a hygain 681 (since that radio uses the PLL01A) and hoping it is relevant, looks like in that radio, the input binary would need to be 10111001 for N=185 to get 26.815. By the same logic, ch1 should be 11001000 for N=200 for verification first.
Reasoning: 26.815-5.945=20.87 and 20.87-(9.51*2)=1.85MHz into the PLL.
Guess I was looking for a bit more simple answer like what pins need cut bridged with a 3.3k and to ground or pin 7 I think it is ? On the 01A
There's more to it than just the PLL chip's specs alone. What model radio is this? The Sams CB books would mostly provide a guide to the particular divider arithmetic for a specific model. That's always been my starting point for a channel mod.
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I actually have 2 one is an early midland board and the second is a kraco if I remember correctly I'll look in the am and post the right models for sure I think they are pretty much the same board and lay out pre 13-882c cause those have the 02A.
Is the PLL01A pinout wrong on RigPix then? 13-888 schematic shows ground on pin 8 and P0 on 16, but in the rigpix datasheet, it shows pin 16 is ground and pin 8 is P7. I assume rigpix is wrong.
and the service manual shows ch1 is all lows on the binary, so apparently, the binary starts at N=200 in that chip. I think that means going down below ch1 won't happen with this chip either, but I could be wrong. I am still perplexed with the 6.4005MHz PLL reference. I've never seen that before.
What's the story here Nomad, what am I missing with this 6.4005 pll reference?
and the service manual shows ch1 is all lows on the binary, so apparently, the binary starts at N=200 in that chip. I think that means going down below ch1 won't happen with this chip either, but I could be wrong. I am still perplexed with the 6.4005MHz PLL reference. I've never seen that before.
What's the story here Nomad, what am I missing with this 6.4005 pll reference?
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Yeah your wrong cause I've actually done it I just should have made a video or wrote it down. I
Originally found the how to in a vintage publication on the net swore it was secret cb but I've looked and looked for it again and cant for the life of me fine it! It told the whole story which pins to address and all.
Then I wait to be educated by the master 
I did find a PLL01A mod in secret cb volume 9 pages 15-17 (but it doesnt look like what you want, sorry)
I did find a PLL01A mod in secret cb volume 9 pages 15-17 (but it doesnt look like what you want, sorry)
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Yeah, I looked at that first and just checked the master mods to see if it's mentioned the pll01a that is, and it's not at all. Can't for the life of me remember it was some old-timey looking printout someone scanned, if I remember correctly. And No master here Lol thats Nomad 100%Then I wait to be educated by the master
I did find a PLL01A mod in secret cb volume 9 pages 15-17 (but it doesnt look like what you want, sorry)
I see that I am not the only one confused on the documentation...
grumpy.proboards.com
so I will hold back and wait for nomad too. In the meantime, if I can figure out what them input pins really do, I may be able to figure it out. Apologies for my earlier assumption this was a binary PLL, it clearly is not. More like a BCD hybrid thing. IDK.
Unusual PLL01a programming.... | Grumpy's Olde Time Radio Forum/ The Best CB Radio Forum on the Net for Browning, Tram and Classic Tube Radio Information
This is a technical post for the PLL tech savvy and curious reader. I was playing with an old 23 channel Kraco KCB-2310a with a PLL01a chip. That is not a typo. It is a PLL01a, and it prece
I see that I am not the only one confused on the documentation...
so I will hold back and wait for nomad too. In the meantime, if I can figure out what them binary pins really do, I may be able to figure it out. Apologies for my earlier assumption this was a binary PLL, it clearly is not. More like a BCD hybrid thing. IDK.Unusual PLL01a programming.... | Grumpy's Olde Time Radio Forum/ The Best CB Radio Forum on the Net for Browning, Tram and Classic Tube Radio Information
This is a technical post for the PLL tech savvy and curious reader. I was playing with an old 23 channel Kraco KCB-2310a with a PLL01a chip. That is not a typo. It is a PLL01a, and it prece
Yes I also scrolled through the pages and pages of that forum as well on the subject it seems it stopped just short of getting lowers to work even downloaded all the attachments and looked them over very carefully.
Take a look at what night ranger wrote:
For example to reach 26.965 MHz subtract 24.965 which equals 2.00 MHz.
Now program pins 9 through 16 as follows;
"10" for 2 MHz (pins 9 and 10)
"00" for the 100 KHz value (pins 11 and 12)
"0000" for the 10 kHz value. (pins 13,14,15, and 16)
10 00 0000
To reach 27.305 MHz (channel 30) subtract 24.965 which equals 2.340 MHz;
Now program pins 9 through 16 as follows;
"10" for 2 MHz (pins 9 and 10)
"11" for 300 MHz (pins 11 and 12)
"0100" for 40 kHz (pins 13,14,15,16)
10 11 0100
This tells me that for 26.815, we would need an 8 on pins 11 and 12 (for 1.85MHz), but they only go up to 3.
Edit to add: Evidence in support of this was found here
The left-most bit not shown and I assume it was pulled high in that radio for the 2MHz digit, but the rest follow as NightRanger explained. So I think we have our answer. Still looking forward to nomads take on it.
For example to reach 26.965 MHz subtract 24.965 which equals 2.00 MHz.
Now program pins 9 through 16 as follows;
"10" for 2 MHz (pins 9 and 10)
"00" for the 100 KHz value (pins 11 and 12)
"0000" for the 10 kHz value. (pins 13,14,15, and 16)
10 00 0000
To reach 27.305 MHz (channel 30) subtract 24.965 which equals 2.340 MHz;
Now program pins 9 through 16 as follows;
"10" for 2 MHz (pins 9 and 10)
"11" for 300 MHz (pins 11 and 12)
"0100" for 40 kHz (pins 13,14,15,16)
10 11 0100
This tells me that for 26.815, we would need an 8 on pins 11 and 12 (for 1.85MHz), but they only go up to 3.
Edit to add: Evidence in support of this was found here
The left-most bit not shown and I assume it was pulled high in that radio for the 2MHz digit, but the rest follow as NightRanger explained. So I think we have our answer. Still looking forward to nomads take on it.
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Took a couple of days off. That chip didn't show up in radios I remember from the 70s. Honestly don't recall modding a radio with that one in it. The only schemo I have here at home shows a PLL02A for that radio. I'll see what the Sams shows next time I get to work.
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I'll admit to being baffled. Turns out there is no Sams CB volume that covers this one. The PLL01A chip says it needs a 10.24 MHz reference input. Pin 4 selects divide by two to the tenth (1024) when high. The schematic shows no connection. Makes it appear the pin is internally pulled up to a logic 1. Grounding pin 4 would appear to select a divide by two to the eleventh power, or 2048. Gives you 5 kHz steps using the 10.24 reference input.
But the only schemo I have appears to be the standard Cybernet style diagram. Osc 3 as it's shown has a 6.4 MHz crystal. Gets buffered by Q104 and then into PLL pin 3.
Huh? 6.4 MHZ divided by 1024 is 6.25 kHZ. Not 10 kHz.
Huh?
There's a hole in this picture. A channel spacing of 6.25 kHz is not what we should be getting.
If the reference divider were not just a ripple counter like every other one of these, that could explain it. Dividing 6.4 MHz by 640 would get you a 10 kHz reference frequency/channel spacing. But 640 is not a direct power of two.
The PLL02A is a direct copy/replica of the Motorola MC145109. Can't remember a Motorola chip from that series with BCD N divider. This chip doesn't fit the normal Motorola pattern.
Might be time to dig out the 1970s Motorola custom CMOS databook with that series of chips and have a look.
Until then I'm baffled.
*** UPDATE ***
Gargle is your friend. Night Ranger on Grumpy's forum worked out a lot of this picture.
https://grumpy.proboards.com/thread...gramming?utm_source=google&utm_medium=organic
I need to go back and read it a bit more slowly to make proper sense, but I think he got it.
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But the only schemo I have appears to be the standard Cybernet style diagram. Osc 3 as it's shown has a 6.4 MHz crystal. Gets buffered by Q104 and then into PLL pin 3.
Huh? 6.4 MHZ divided by 1024 is 6.25 kHZ. Not 10 kHz.
Huh?
There's a hole in this picture. A channel spacing of 6.25 kHz is not what we should be getting.
If the reference divider were not just a ripple counter like every other one of these, that could explain it. Dividing 6.4 MHz by 640 would get you a 10 kHz reference frequency/channel spacing. But 640 is not a direct power of two.
The PLL02A is a direct copy/replica of the Motorola MC145109. Can't remember a Motorola chip from that series with BCD N divider. This chip doesn't fit the normal Motorola pattern.
Might be time to dig out the 1970s Motorola custom CMOS databook with that series of chips and have a look.
Until then I'm baffled.
*** UPDATE ***
Gargle is your friend. Night Ranger on Grumpy's forum worked out a lot of this picture.
https://grumpy.proboards.com/thread...gramming?utm_source=google&utm_medium=organic
I need to go back and read it a bit more slowly to make proper sense, but I think he got it.
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