Looks more complicated than it really is. The top two lines have some stuff in them but the rest is just ctrl+D to fill down. Here is a quick rundown on how all the frequencies are mixed.
View attachment 75541
The 10.24MHz goes into the PLL and is divided by 1024 to create 10kHz (this is the channel step, how much it changes incrementing N). The other side of the phase detector wants to see the same 10kHz, so it will steer the VCO up and down until it sees 10kHz.
To get that other 10kHz, the input needs to see something the divider can get down to 10kHz. The divider can only divide by so much, it has a limited divider range), so the frequency needs to be pretty low going in, around 1MHz. To get this 1MHz signal, the VCO is designed so that when it is mixed with the 11MHz tripler output (33MHz), the output is in the 1MHz range the PLL divider needs to see.
The channel selector gives us a binary N value of 101 for ch19, so 10kHz*101=1.01MHz (this is what must come out of the loop mixer). The tripler is set by the crystal and is fixed at 33.975MHz, so to get 1.01MHz, the VCO needs to make 34.985MHz. and the phase detector will steer it until it reaches it.
The VCO output goes two ways, to the mixer to generate 1MHz as mentioned above, and to the transmit mixer where it is converted to the output frequency.
The logic table provides the N values, and multiplying them by the channel step (10kHz at the phase detector) you get the loop mixer output frequency. Add that to the tripler frequency and you get the VCO frequency. Add that to the mode selection oscillator frequency (the 7.8MHz one) and you get the final frequency.
Thats all the top row of that spreadsheet does, the rest is just filled down.
