Just remember that the 1230 can also be used as a "Stand alone" to power the Gate - you adjust the capacitance into the circuit to apply enough drive - it will do the rest.
So in reference to the Palomar, that 1K is simple current limiting - the Gate's can rise to as high as 7 volts DC crudely measured while it's powered up using a Dead Carrier of about 4 watts. They say they can handle up to 20VDC on the gate so --- Go For Broke - eh?
The easier way to see it's "Shunt resistor" is to simply DVM the ohmic results - both ways, one will be quite low - with Diode resistor in parallel but reversed test lead (polarity reversed) the ohmic reading can be made DIRECT.
They have changed to LOWER values...while they were being made thru the years...So when CBT first posted those results - not everyone saw these values - but then too, capacitor values were modified thru the years as they (Read:EKL) refined the balance.
- NOTE: "refined" may imply an "error" - not really, MOSFET refinements thru the years provided various ways to get the power thru the device so as the playing field grew, so did it's grass - and required mowing eliminated a lot of weeds but then took away some of the better turf they used to obtain their drive and performance they are so noted for.
Look for Motorolas' 12N10 (not the 13)...you'll get a clue there too...(Hint: Fig. 5)
The one observation I have to offer is their capacitive levels. Although sluggish compared to say a 13N10 - they operate under a similar principle of using input capacitance TO the Gate and the Gates' OWN capacitance - put the two together - forms a Paralleled capacitance circuit - you can use these crude values as a means to "cushion" and shape the RF wave to offset any sort of skewing the DC bias will bring to the table due to it's own rectification - per the EN1230 or 369FN/DR parts. A power level value can be obtained from that to keep the RF wave symmetry even and not skewed.
ADDED---:
To add a little more, the Fig 5 in the PDF, is for demonstration of how the Gate charge changes.
So there too is another event like paralleled - in series related to capacitance - or why the Gate has a capacitance and how to offset it's input capacitance with the proper level of drive, either by DC offset (raise or lower trigger) or adjust input capacitance to offset the power losses incurred by the device (in this scenario ERF types) having to absorb and convert RF value to a DC value - and to use the EN 1230 as a stand alone is possible - but take heed that as you raise the Drive Resistance in using the 1230 from <1K to a higher value towards 10K it takes a lot longer to remove the field charge from the Gate simply due to the effort the voltage has to drop across the ERF device (reverse bias on diode as well) to take longer to drain away- so lead dress as well as the shortcomings of higher "Bleed down" voltage presence may make the parts "latch" and stay latched if you want to raise that Gate Bias voltage too high.
A secondary event of oscillation is going to occur if the Gate charge "spills out" and the Resistors cannot keep the Charge contained . There is a reason for that 5V regulator and it's RF bypass - it helps act as a shock absorber when Gate voltage RISES above 5V - the Feed rises too and the Regulators own sense will work around this - but only to a certain degree.
Think of the 5V and it's purity as a "baffle" in that reserve pool - too many waves create the turbulence - while the Baffle that regulation provides, lends to tamping it down.
IF any of you know of Hot Spotting - this is what could happen to that Gate region. So to "Choke off" the feeder and leave the 1230 to fend for itself - it may need more help in the use of extra swamping resistance to stabilize the gate and provide a path for the charge to escape or at least stabilize.
Some radios, including Uniden are using a similar method ...
Just cautioning the rest of you so you don't suffer that same fate as I did learning the above lesson.