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Rocketbox info thread !!! Made in the USA with a reasonable pricetag !

Would you like to build you own Rocketbox linear from a kit ??


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solid-state RF power was still kinda twitchy under high mismatch conditions back in those days.

That's probably why they gave the Micor a built in antenna matcher that could cope with anything between 25 to 100 ohms. I have a few Motrac units that still work and was surprised to see them on eBay for $225! I hate to think about how many I threw out after saving them for 20 years.
 
I haven't seen such low gain per stage since the 1970's when Motorola would use 7 flange mount transistors in 3 stages to produce 120 watts in VHF lowband. Today, this is easily done using one quality transistor in one well designed stage.

The one good thing about the low gain stages SHOULD be durability. However due to it being FETs, that half-way goes out the window. FET's will take a lot of abuse on the Drain/Source, but the Gate is a different story. If that gate signal gets screwy, pop goes the mosfet. I only blew the 7530's up one time in my testing in 2010/2011, not sure what or how that happened. I wasn't driving with excess drive power, but I was using a little Blackcat JB75 (single 8417) amplifier as the driver, and may have had a problem with the tube or the DC blocking cap, or not. Been too long ago.
 
Great care must be taken in the design stages to ensure that the gate does not get abused. Bipolars are even worse in this area!
FET's have a Positive temperature coefficient which is way more stable than the bipolar negative temperature coefficient. Fets are almost in their infancy with new design improvements almost daily.
 
The one good thing about the low gain stages SHOULD be durability. However due to it being FETs, that half-way goes out the window. FET's will take a lot of abuse on the Drain/Source, but the Gate is a different story. If that gate signal gets screwy, pop goes the mosfet. I only blew the 7530's up one time in my testing in 2010/2011, not sure what or how that happened. I wasn't driving with excess drive power, but I was using a little Blackcat JB75 (single 8417) amplifier as the driver, and may have had a problem with the tube or the DC blocking cap, or not. Been too long ago.

Those Blackcat "modulators" have blown up more than one amplifier they have been placed in front of due to self oscillations. The idea of placing the output tank coil in the same tight compartment as the grid input circuit without any shielding is just a problem waiting to happen. You may want to check and see if there is a DC shorting choke across the output. If not, the DC blocking cap is being charged through the gate circuit of the FET amp rather than a direct shunt to ground.
 
FET's have a Positive temperature coefficient which is way more stable than the bipolar negative temperature coefficient.

All of the high power RF MOSFET's I've personally tested are showing a negative temperature coefficient when operated any where near rated output. That is different than a standard FET. Interestingly enough, I can detect a barley measurable positive coefficient at very low drive levels but, they act just like bipolar transistors at normal operating levels. The higher voltage ones are extremely susceptible to thermal runaway without careful bias design.

PS: While I have seen this same characteristic in several 50 volt MOSFET's, I am curious to know if anyone can confirm the coefficient seen with the BLF-188XR?
 
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All of the high power RF MOSFET's I've personally tested are showing a negative temperature coefficient when operated any where near rated output. That is different than a standard FET. Interestingly enough, I can detect a barley measurable positive coefficient at very low drive levels but, they act just like bipolar transistors at normal operating levels. The higher voltage ones are extremely susceptible to thermal runaway without careful bias design.

PS: While I have seen this same characteristic in several 50 volt MOSFET's, I am curious to know if anyone can confirm the coefficient seen with the BLF-188XR?
I very, very rarely disagree with your postings. But I will state the physics involved do not allow devices to change the temperature coefficients.
I am willing to wager what you saw was a runaway parasitic oscillation that would have mimicked a thermal runaway. I have seen that when a compensation network went resonant and provided regenerative feedback.
 
I very, very rarely disagree with your postings. But I will state the physics involved do not allow devices to change the temperature coefficients.
I am willing to wager what you saw was a runaway parasitic oscillation that would have mimicked a thermal runaway. I have seen that when a compensation network went resonant and provided regenerative feedback.
Except that's not what the manufacturer states and they provide a very technical explanation (beyond my understanding) as to why this changes as current or VDD increases. I'm seeing the same characteristics in several different amplifiers using different transistors. It was so misleading in my early low power testing that I thought I would need to design the bias to increase with heat. What a disaster that was. The problem completely disappears once the bias is thermally tracking correctly too.

The downward drift in bias at very low drive is almost not measurable and is a tiny percentage of the total bias current that does not require any compensation. The drift upwards at normal power can reach self destructive levels if not tracked and regulated.

The upward drift in bias current is directly related to heat. I can control how high it rises by how long I hold the amp keyed with a full power carrier. When I remove the drive and maintain bias, I can clearly see that is has increased substantially and quickly drops back to normal as the junction cools. It was only when I made the mistake of holding it keyed too long and the DC bias drifted up very high, removal of drive could not break the thermal runaway cycle however, no RF at all could be seen on the scope because the additional current is all DC component.
 
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Except that's not what the manufacturer states and they provide a very technical explanation (beyond my understanding) as to why this changes as current or VDD increases. I'm seeing the same characteristics in several different amplifiers using different transistors. It was so misleading in my early low power testing that I thought I would need to design the bias to increase with heat. What a disaster that was. The problem completely disappears once the bias is thermally tracking correctly too.

The downward drift in bias at very low drive is almost not measurable and is a tiny percentage of the total bias current that does not require any compensation. The drift upwards at normal power can reach self destructive levels if not tracked and regulated.

The upward drift in bias current is directly related to heat. I can control how high it rises by how long I hold the amp keyed with a full power carrier. When I remove the drive and maintain bias, I can clearly see that is has increased substantially and quickly drops back to normal as the junction cools. It was only when I made the mistake of holding it keyed too long and the DC bias drifted up very high, removal of drive could not break the thermal runaway cycle however, no RF at all could be seen on the scope because the additional current is all DC component.
I would like to see those white papers on the semiconductor.
 
The MOSFETs aren't changing from PTC to NTC. Many MOSFETs that I've used exhibit this behavior and once you know why, it's super simple. MOSFETs have 2 separate characteristics to consider, the gate-source threshold voltage (VGSth), and the drain-source on resistance (RDSon). The VGSth has a NTC slope while the RDSon has a PTC slope.
If you're building a switched mode power supply, where the FETs are always either fully on or fully off, then your devices will operate primarily with a PTC slope and you can usually completely ignore the VGSth aspect of the device. This would probably apply to Class-E RF switching PAs as well, but I only have experience with SMPSs as far as switching applications go.
Now, since we're building linear PAs here, we're operating the MOSFETs in their linear region and with quiescent bias current following. In this case the NTC slope of the VGSth is very important and it is why you need thermal tracking bias circuitry to keep these devices from going into thermal runaway. If you hold a constant bias voltage on the gate of a MOSFET it will draw more current as it heats up.
The slopes of the two different characteristics have differences in how steep they are, if they are curved or not, and in some devices they even cross at a certain temperature. If they cross, this will usually cause the effect described above. Below a certain die temperature, the PTC effect of the RDS will be dominant, then as the temperature rises, the NTC effect of the VGSth will rapidly overtake it since it's slope is usually much steeper.
I don't have much experience with LDMOS devices, but I've built many SMPSs and I've home-brewed quite a few linear PAs with both switching FETs and VDMOS RF FETs, and they behave completely opposite in the two applications. I haven't encountered too many devices where the slopes crossing has been a problem, but it can cause issues when trying to stabilize a biasing circuit, depending on the crossing temperature.
If I can locate the PDF file of the article that first clued me in to this weird behavior, I'll attach it. I'm not sure where it's saved at. I do remember having a conversation about this in another thread a long while back though. Hope this helps to explain what might at first seem impossible.

Brad - KC3MOP
 
The MOSFETs aren't changing from PTC to NTC. Many MOSFETs that I've used exhibit this behavior and once you know why, it's super simple. MOSFETs have 2 separate characteristics to consider, the gate-source threshold voltage (VGSth), and the drain-source on resistance (RDSon). The VGSth has a NTC slope while the RDSon has a PTC slope.
If you're building a switched mode power supply, where the FETs are always either fully on or fully off, then your devices will operate primarily with a PTC slope and you can usually completely ignore the VGSth aspect of the device. This would probably apply to Class-E RF switching PAs as well, but I only have experience with SMPSs as far as switching applications go.
Now, since we're building linear PAs here, we're operating the MOSFETs in their linear region and with quiescent bias current following. In this case the NTC slope of the VGSth is very important and it is why you need thermal tracking bias circuitry to keep these devices from going into thermal runaway. If you hold a constant bias voltage on the gate of a MOSFET it will draw more current as it heats up.
The slopes of the two different characteristics have differences in how steep they are, if they are curved or not, and in some devices they even cross at a certain temperature. If they cross, this will usually cause the effect described above. Below a certain die temperature, the PTC effect of the RDS will be dominant, then as the temperature rises, the NTC effect of the VGSth will rapidly overtake it since it's slope is usually much steeper.
I don't have much experience with LDMOS devices, but I've built many SMPSs and I've home-brewed quite a few linear PAs with both switching FETs and VDMOS RF FETs, and they behave completely opposite in the two applications. I haven't encountered too many devices where the slopes crossing has been a problem, but it can cause issues when trying to stabilize a biasing circuit, depending on the crossing temperature.
If I can locate the PDF file of the article that first clued me in to this weird behavior, I'll attach it. I'm not sure where it's saved at. I do remember having a conversation about this in another thread a long while back though. Hope this helps to explain what might at first seem impossible.

Brad - KC3MOP
Excellent job of explaining how the two opposing characteristics interact between the gate and the drain. You've actually taken the explanation one step further than what I've previously heard in relation to class of operation. This also matches exactly what I observed in early testing that was all done in class C prior to stabilizing any oscillations and where the misleading PTC was seen. It is the application of linear bias that causes these devices to operate in the NTC region.
 
Yes please send me that PDF. I am in need intellectual stimulation. Still too sick to go running around.

It's not in my stash of documents on my phone. As soon as I get a chance I'll check my old phone and dig through all the ones on my computer. I know I saved that info somewhere. (n)
Get better soon brother.
 
You can see a picture of the loaded PA board at this link:


The first problem I spot is the use of the brown and yellow dipped silver mica caps, directly across the output combiner. These caps struggle to handle the current across the output transformer of two 2SC2879's, much less being used at the 800 watt plus level, with 8 transistors in front of them. Those caps will get hot and drift far from the original value, if the amp makes the specified power output.

Another problem I see is the lack of RF decoupling from the DC line. Why don't we see any RF chokes feeding the DC into the RF output transformers? Some ferrite seems to be missing here. Without chokes, the electrolytics are prone to exploding from RF. It also makes it very easy for the final RF to work its way back down the DC line and into the driver stage, where it makes oscillations happen. I won't even get mention what happens when that RF gets into the vehicle electrical system or power supply regulators through the DC line...

PS: Notice there is no coax from that output combiner to the small relays in the back. This means the RF output is carried through an unshielded trace on the PC board. Not so good for impedance and awful for contaminating the input stage and bias circuits, with stray RF from the output.
 
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