You're welcome! Wish I knew what was wrong.
Now that we know the 91MHz PLL is walking around and that the reference is good, it must be between the PLL IC and the VCO buffer.
First thing I would do is ensure the VCO's buffer is working and that its output is making it to the PLL IC. I would do this by using the handheld radio to sniff for the 91MHz at pin 15 of the PLL (be fast, catch it when it quiets or track the shift on the handheld). The cap at the output of the buffer (Q4) is large for 91MHz, so the signal should be just as strong at pin 15 as it is at the buffer.
PLL chips are usually diagnosed with an 'oscope, however...
If you had a sensitive audio probe (like a Carlson Superprobe (see youtube) with an H-field probe attachment), you can listen for the divided down PLL signals since they are in the audible range. I just came up with that idea so I tried it on my President Washington before posting this. Theory confirmed, I hear 10kHz!!!). It don't work with the E-field probe that Mr. Carlson designed the probe for, but toss a loop on it and it works for this***.
Both the 9MHz reference and the 91MHz are both divided down to 5kHz. Sever the connection from the VCO buffer (pull C53 C15 for example) and listen for the 9MHz/1800=5kHz. And since your VCO is slowly walking past, you should be able to reinstall that cap and hear the other 5-kHz signal heterodyne with the divided reference as it passes. Remember, the loop needs to be right on the PLL chip and loop orientation matters, so turn it until you hear the 5kHz.
Next question, does the phase detector output track frequency changes? Its moving, we know that, but in response to anything? Lets give it something to respond to. Probe the test point with the volt meter and, while ignoring the slow drift you see, take something metallic and touch that varactor. Remember how probing the wrong side of that inductor before caused it to rail? Did the test point rail again or get squirrely?
That leaves one last aspect of the PLL to check, the digital inputs. I am going to write them off as being good since VCO5 is getting its data and they share the same data lines. What is different is the clock signal. Each PLL gets its own clock signal from the same chip that produces the data (IC2 on the control board). This means all you gotta do is verify there is an AC signal on pin 9. Easy enough (just catch it when it loads data, probably at power up).
If you have a solder sucker and experience removing IC chips, swapping the PLLs for VCO 4 and 5 around could give us the same answer much faster (since we know 5 is good).
***I will admit, I believe my washingtons PLL is TTL, yours is CMOS, so I am not sure there is enough current flow in yours for an H-field probe to detect it. But with those gates, maybe the E-field is worth a try???